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10.4 Interrupt Vector Table
The interrupt controller supports 24 interrupt sources as shown in the Table 10-2. When interrupt is served, long call
instruction (LCALL) is executed and program counter jumps to the vector address. All interrupt requests have their
own priority order.
Table 10.2 Interrupt Vector Address Table
For maskable interrupt execution, EA bit must set ‘1’ and specific interrupt must be enabled by writing ‘1’ to associated
bit in the IEx. If an interrupt request is received, the specific interrupt request flag is set to ‘1’. And it remains ‘1’ until
CPU accepts interrupt. If the interrupt is served, the interrupt request flag will be cleared automatically.
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