69
ABOV Semiconductor Co., Ltd.
10.2 External Interrupt
The external interrupt on INT0, INT1, INT10, INT11 and INT12 pins receive various interrupt request depending on the
external interrupt polarity 0 register (EIPOL0) and external interrupt polarity 1 register (EIPOL1) as shown in Figure
10.1. Also each external interrupt source has enable/disable bits. The external interrupt flag register (EIFLAG) provides
the status of external interrupts.
EINT0 Pin
FLAG0
EIPOL0
INT5 Interrupt
EINT11 Pin
EIPOL1
2
2
2
EINT12 Pin
FLAG11
FLAG12
INT1 Interrupt
INT2 Interrupt
EINT10 Pin
FLAG10
INT0 Interrupt
EINT1 Pin
FLAG1
EIPOL0
INT11Interrupt
Figure 10.1 External Interrupt Description