Abov MC96F8204 Series User Manual

110
MC96F8204
ABOV Semiconductor Co., Ltd.
11.6.7 Timer/Counter 1/2 Register Description
The timer/counter 1/2 register consists of timer 1/2 A data high register (TnADRH), timer 1/2 A data low register
(TnADRL), timer 1/2 B data high register (TnBDRH), timer 1/2 B data low register (TnBDRL), timer 1/2 control high
register (TnCRH) and timer 1/2 control low register (TnCRL).
11.6.8 Register Description for Timer/Counter 1/2
TnADRH (Timer n A data High Register) : 9BH/B3H, Where n = 1 and 2
7
6
5
4
3
2
1
0
TnADRH7
TnADRH6
TnADRH5
TnADRH4
TnADRH3
TnADRH2
TnADRH1
TnADRH0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial value : FFH
TnADRH[7:0]
Tn A Data High Byte
TnDRL (Timer n A Data Low Register) : 9AH/B2H, Where n = 1 and 2
7
6
5
4
3
2
1
0
TnADRL7
TnADRL6
TnADRL5
TnADRL4
TnADRL3
TnADRL2
TnADRL1
TnADRL0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial value : FFH
TnADRL[7:0]
Tn A Data Low Byte
NOTE)
1. Do not write “0000H” in the TnADRH/TnADRL register when PPG
mode
TnBDRH (Timer n B Data High Register) : 9DH/B5H, Where n = 1 and 2
7
6
5
4
3
2
1
0
TnBDRH7
TnBDRH6
TnBDRH5
TnBDRH4
TnBDRH3
TnBDRH2
TnBDRH1
TnBDRH0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial value : FFH
TnBDRH[7:0]
Tn B Data High Byte
TnBDRL (Timer n B Data Low Register) : 9CH/B4H, Where n = 1 and 2
7
6
5
4
3
2
1
0
TnBDRL7
TnBDRL6
TnBDRL5
TnBDRL4
TnBDRL3
TnBDRL2
TnBDRL1
TnBDRL0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial value : FFH
TnBDRL[7:0]
Tn B Data Low Byte

Abov MC96F8204 Series Specifications

General

Brand	Abov
Model	MC96F8204 Series
Category	Microcontrollers
Language	English