Abov MC96F8204 Series

84
MC96F8204
ABOV Semiconductor Co., Ltd.
11.1.2 Block Diagram
Clock
Change
XIN
XOUT
Main OSC
fXIN
Internal
RC OSC
LF INT-RC
(200kHz)
HF INT-RC
(8MHz)
STOP Mode
HFIRCE
LFIRCE
STOP Mode
fHFIRC
1/1
1/2
1/4
1/8
M
U
X
HFIRCS[2:0]
fLFIRC
System
Clock Gen.
(Core, System,
Peripheral)
SCLK (fx)
BIT
WDT
BIT
overflow
WDTRC OSC
(5KHz)
WDTRC
Stabilization Time
Generation
M
U
X
WDT clock
/256
BIT clock
fx/4096
fx/1024
fx/128
fx/16
M
U
X
BITCK[1:0]
STOP Mode
XCLKE
1/16
SCLK[1:0]
2
SXIN
SXOUT
Sub OSC
fSUB
STOP Mode
SCLKE
WT
1/1
1/2
1/4
1/8
M
U
X
LFIRCS[1:0]
Figure 11.1 Clock Generator Block Diagram