Abov MC96F8204 Series

170
MC96F8204
ABOV Semiconductor Co., Ltd.
13 RESET
13.1 Overview
The following is the hardware setting value.
On Chip Hardware
Initial Value
Program Counter (PC)
0000h
Accumulator
00h
Stack Pointer (SP)
07h
Peripheral Clock
On
Control Register
Refer to the Peripheral Registers
Table 13.1 Reset State
13.2 Reset Source
The MC96F8204 has five types of reset sources. The following is the reset sources.
− External RESETB
− Power ON RESET (POR)
− WDT Overflow Reset (In the case of WDTEN = `1`)
− Low Voltage Reset (In the case of LVREN = `0 `)
− OCD Reset
13.3 RESET Block Diagram
Figure 13.1 RESET Block Diagram
WDT RST
LVR
LVR Enable
RESET Noise
Canceller
POR RST
OCD RST
S Q
R
Internal
Reset
IFBIT
(BIT Overflow)
OCD RSTEN
Ext RESET
Disable by FUSE
RESET Noise
Canceller