EasyManuals Logo

Abov MC96F8204 Series User Manual

Abov MC96F8204 Series
212 pages
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Page #76 background imageLoading...
Page #76 background image
76
MC96F8204
ABOV Semiconductor Co., Ltd.
10.11 Interrupt Timing
Figure 10.10 Timing Chart of Interrupt Acceptance and Interrupt Return Instruction
Interrupt sources are sampled at the last cycle of a command. If an interrupt source is detected the lower 8-bit of
interrupt vector (INT_VEC) is decided. M8051W core makes interrupt acknowledge at the first cycle of a command,
and executes long call to jump to interrupt service routine.
NOTE)
1. command cycle CLPx: L=Last cycle, 1=1
st
cycle or 1
st
phase, 2=2
nd
cycle or 2
nd
phase
CLP2
CLP1
C2P1
C1P1
C2P2
C1P2
CLP2
Interrupt sampled here
8-Bit interrupt Vector
INT_SRC
INTR_ACK
LAST_CYC
INTR_LCALL
INT_VEC
PROGA
SCLK
{8h00, INT_VEC}

Table of Contents

Questions and Answers:

Question and Answer IconNeed help?

Do you have a question about the Abov MC96F8204 Series and is the answer not in the manual?

Abov MC96F8204 Series Specifications

General IconGeneral
BrandAbov
ModelMC96F8204 Series
CategoryMicrocontrollers
LanguageEnglish

Related product manuals