Abov MC96F8204 Series

106
MC96F8204
ABOV Semiconductor Co., Ltd.
Figure 11.15 Input Capture Mode Operation for Timer 1/2
Figure 11.16 Express Timer Overflow in Capture Mode
TnCNTH/L
Interrupt
Request
(FLAG1n)
XX
H
Interrupt Interval Period = FFFF
H
+01
H
+FFFF
H
+01
H
+YY
H
+01
H
Ext. EINT1n PIN
Interrupt
Request
(TnIFR)
FFFF
H
FFFF
H
YY
H
00
H
00
H
00
H
00
H
00
H
TnCNTH/L
Value
Interrupt
Request
(FLAG1n)
TIME
1
2
3
4
5
6
n-2
n-1
n
Interrupt Interval Period
0
Count Pulse Period
P
CP
Up-count
TnBDRH/L Load
Ext. EINT1n PIN