Abov MC96F8204 Series

102
MC96F8204
ABOV Semiconductor Co., Ltd.
T0CR (Timer 0 Control Register) : 90H
7
6
5
4
3
2
1
0
T0EN
–
T0MS
–
T0CK2
T0CK1
T0CK0
T0CC
R/W
–
R/W
–
R/W
R/W
R/W
R/W
Initial value : 00H
T0EN
Control Timer 0
0
Timer 0 disable
1
Timer 0 enable(Counter clear and start)
T0MS
Control Timer 0 Operation Mode
0
Timer/counter mode
1
Capture mode (The match interrupt can occur)
T0CK[2:0]
Select Timer 0 clock source. fx is a system clock frequency
T0CK2
T0CK1
T0CK0
Description
0
0
0
fx/2
0
0
1
fx/4
0
1
0
fx/8
0
1
1
fx/32
1
0
0
fx/128
1
0
1
fx/512
1
1
0
fx/2048
1
1
1
Not available
T0CC
Clear timer 0 Counter
0
No effect
1
Clear the Timer 0 counter (When write, automatically cleared “0” after being
cleared counter)
NOTE)
1. Refer to the external interrupt flag register (EIFLAG) for the T0 interrupt flags.