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ABOV Semiconductor Co., Ltd.
TnCRL (Timer n Control Low Register) : 98H/B0H, Where n = 1 and 2
Initial value : 00H
Select Timer n clock source. fx is main system clock frequency
When Tn Interrupt occurs, this bit becomes ‘1’. For clearing bit, write ‘0’ to this bit or
auto clear by INT_ACK signal. Writing “1” has no effect.
Tn Interrupt no generation
Control Timer n Reload Signal
Enable timer n reload signal
Disable timer n reload signal
TnO/PWMnO Polarity Selection
Start High (TnO/PWMnO is low level at disable)
Start Low (TnO/PWMnO is high level at disable)
Timer n External Clock Edge Selection
External clock falling edge
External clock rising edge
Timer n Counter Read Control
Load the counter value to the B data register (When write, automatically
cleared “0” after being loaded)