Abov MC96F8204 Series User Manual

157
MC96F8204
ABOV Semiconductor Co., Ltd.
The CRC operation procedure in Auto CRC/Checksum mode
1. Global interrupt Disable (EA = 0)
2. Select Auto CRC/Checksum Mode and CRC
3. Select CRC Clock
4. Set CRC start address register (FCSARH/FCSARM/FCSARL)
5. Set CRC end address register (FCEARH/FCEARM/FCEARL)
6. CRC operation starts (CRCRUN = 1)
7. Read the CRC result
8. Global interrupt Enable (EA = 1)
Program Tip – Auto CRC/Checksum mode
//**** Global interrupt Disable
EA = 0;
//**** Flash CRC Auto CRC/Checksum Mode and CRC
FCCR &= _0101_1111;
OSCCR &= _1111_1011; // IRC Enable
FCCR &= _1111_0001; // CRC clk = fIRC/1
//**** CRC start address set
FCSARH = 0x00;
FCSARM = 0x00;
FCSARL = 0x00;
//**** CRC end address set
FCEARH = 0x00;
FCEARM = 0x3F;
FCEARL = 0xFF;
//**** CRC start
FCCR |= _0000_0001;
_nop_(); //Dummy instruction, This instruction must be needed.
_nop_(); //Dummy instruction, This instruction must be needed.
_nop_(); //Dummy instruction, This instruction must be needed.
//**** Read CRC result
Temp0 = FCDRH;
Temp1 = FCDRL;
//**** Global interrupt Enable
EA = 1;
NOTE)
1. Three or more NOP instructions must immediately follow the CRC start operation in auto
CRC/Checksum mode.
2. During a CRC operation(when CRCRUN bit is Running state) in auto CRC/Checksum mode, the CPU is
hold and the global interrupt is on disable state regardless of the IE.7 (EA) bit. But should be set the
global interrupt is disabled (EA = 0) before the CRC operation is started in use auto CRC/Checksum
mode, recommend.

Abov MC96F8204 Series Specifications

General

Brand	Abov
Model	MC96F8204 Series
Category	Microcontrollers
Language	English