Abov MC96F8204 Series User Manual

86
MC96F8204
ABOV Semiconductor Co., Ltd.
OSCCR (Oscillator Control Register) : C8H
7
6
5
4
3
2
1
0
LFIRCE
–
HFIRCS2
HFIRCS1
HFIRCS0
HFIRCE
XCLKE
SCLKE
R/W
–
R/W
R/W
R/W
R/W
R/W
R/W
Initial value : 08H
LFIRCE
Control the operation of the low frequency internal RC oscillator
0
Disable operation of LF INT-RC OSC
1
Enable operation of LF INT-RC OSC
HFIRCS[2:0]
Internal RC Oscillator Post-divider Selection
IRCS2
IRCS1
IRCS0
Description
0
0
0
INT-RC/16 (0.5MHz)
0
0
1
INT-RC/8 (1MHz)
0
1
0
INT-RC/4 (2MHz)
0
1
1
INT-RC/2 (4MHz)
1
0
0
INT-RC/1 (8MHz)
Other values
Not used
HFIRCE
Control the operation of the high frequency internal RC oscillator
0
Enable operation of HF INT-RC OSC
1
Disable operation of HF INT-RC OSC
XCLKE
Control the Operation of the External Main Oscillator
0
Disable operation of X-TAL
1
Enable operation of X-TAL
SCLKE
Control the Operation of the External Sub Oscillator
0
Disable operation of SX-TAL
1
Enable operation of SX-TAL
NOTE)
1. The system clock is not disabled by the corresponding bit of the OSCCR register. Ex) The high
frequency internal RC oscillator won’t be disabled by the HFIRCE bit during the fHFIRC is selected as
the system clock.
LIFSR (LFIRC Frequency Selection Register): C9H
7
6
5
4
3
2
1
0
LIWTP4
LIWTP3
LIWTP2
LIWTP1
LIWTP0
–
LFIRCS1
LFIRCS0
W
W
W
W
W
–
R/W
R/W
Initial value: 00H
LIWTP[4:0]
Write Identification bits. These bits are automatically cleared to “00000b” immediately
after LIWTP write. 0x00 on read.
10110b
Write 0x16 to these bits with valid LFIRCS[1:0]
Other values
Write is ignored.
LFIRCS[1:0]
LFIRC oscillator post-divider selection.
LFIRCS1
LFIRCS0
Description
0
0
fLFIRC/8(25kHz)
0
1
fLFIRC/4(50kHz)
1
0
fLFIRC/2(100kHz)
1
1
fLFIRC/1(200kHz)

Abov MC96F8204 Series Specifications

General

Brand	Abov
Model	MC96F8204 Series
Category	Microcontrollers
Language	English