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ADCMT 7352A - Page 145

ADCMT 7352A
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7352 Series Digital Multimeter Operation Manual
6.6.4 SCPI Command Reference
6-41
System Status
*CLS
Clears each status byte.
*STB?
Reads the status byte register
Reply: ddd
*SRE <int>
Sets the service request enable register.
<int>: 0 to 255 (However, bit6 cannot be set.)
*SRE?
Reply: ddd
*ESR?
Reads the standard event status register.
Reply: ddd
*ESE <int>
Sets the standard event status enable register.
<int>: 0 to 255
*ESE?
Reply: ddd
:STATus:MEASurement:EVENt?[(@<ch>)]
Reads the measurement event register.
Reply: ddddd
:STATus:MEASurement:ENABle
<int>[,(@<ch>)]
Sets the measurement event enable register.
<int>: 0 to 65535
:STATus:MEASurement:ENABle?
[(@<ch>)]
Reply: ddddd
:STATus:OPERation:EVENt?
Reads the operation event register.
Reply: ddddd
:STATus:OPERation:ENABle <int>
Sets the operation event enable register.
Reply: ddddd
:STATus:OPERation:ENABle?
Reply: ddddd
:STATus:QUEStionable:EVENt? [(@<ch>)]
Reads the questionable event register.
Reply: ddddd
:STATus:QUEStionable:ENABle
<int>[,(@<ch>)]
Sets the questionable event enable register.
<int>: 0 to 65535
:STATus:QUEStionable:ENABle?
[(@<ch>)]
Reply: ddddd
*PSC <int>
<int>: -32767 to +32767
If "int" is set to any value except for zero, SRER
and SESER are cleared when the power is turned
on.
*PSC?
Reply: 0 or 1
(When any value except for zero is set.)
Option
*OPT?
Reads the option information.
Reply: 0 No option
Operation
complete
*OPC
Sets the operation complete bit (bit0) of the Stan-
dard Event Status Register after all operations are
complete.
*OPC?
Reply: 1 (After all operations are complete.)
*WAI
Waits for the completion of all operations.
(GPIB only)
Self-Test
*TST?
Performs the self- test and reads the result.
(It takes time to perform the self-test. Read the
result after executing the *WAI command.)
Reply 0 : Pass
1 : Fail
Item SCPI command
Description
Initial
value

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