Section 7 Common Commands
7-8
∗OPC Operation Complete Command
(Sets bit 0 of the standard event status register when device operations have been
completed)
■ Format
∗OPC
■ Application example
WRITE @108 : “∗OPC”
■ Explanation
When all the pending device operations have been completed, standard event sta-
tus register bit 0 (i.e.,
operation complete bit) is set. However, since the
MS9710C does not have an overlap command, the ∗OPC command counts for
nothing.
enabled=2
0
7
ESB
MAV
3
2
1
0
MSS 6 RQS
……Output Queue
1
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
&
&
&
&
&
&
&
&
Logical OR
Power-ON
User request
Command error
Execution error
Device-dependent error
Query error
Bus control request
Operation complete
Standard Event Status
Register
Standard Event Status
Enable Register
Status Byte Register
∗OPC
Command
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