BL702/704/706 Reference Manual
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Fig. 5.1: DAC basic block diagram
The DAC module contains two DAC modulation circuits and a power supply circuit related to modulating analog
signals. The user can use Ref_Sel to select whether the DAC reference voltage is external/internal, and Ref_Rng to
select the internal reference voltage source.
The modulation data of the DAC can be directly written into the DAC modulation register (GLB_GPDAC_A_DATA,
GLB_GPDAC_B_DATA in 0x40000314) by the CPU, or it can be transferred to the gpdac_dma_wdata (0x40002048)
register by the DMA.
DAC data writing method
The CPU directly writes the GLB_GPDAC_A_DATA, GLB_GPDAC_B_DATA registers to complete the modulation, or
uses DMA to transfer the data that needs to be modulated to gpdac_dma_wdata.
DMA handling mode
gpdac_dma_wdata (0x40002048) is a 32BITS register. The default meaning is that the 32BITS values are all modu-
lated on the ChannelA pin in order. It can also be configured as the high 16 bits which correspond to the analog volt-
age output of Channel B by default, and the low 16 bits correspond to the analog voltage output of Channel A.
Note that whether it is 32/16-bit modulation, only the lower 10 bits are valid, because the maximum modulation
accuracy of the DAC is 10BITS. The user can modify the meaning of the high and low bytes transported by the DMA
by configuring the gpdac_dma_format register.
If gpdac_dma_format is 0, the data transferred by DMA into gpdac_dma_wdata are all modulated in Channel A in
BL702/704/706 Reference Manual 112/ 375
@2021 Bouffalo Lab
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