11
I2C
11.1 I2C introduction
I2C (Inter-Intergrated Circuit) is a serial communication bus that uses a multi-master-slave architecture to connect
low-speed peripheral devices.
Each device has a unique address identification and can be used as a transmitter or receiver. Each device connected
to the bus can set the address by software with a unique address and the always-receiving master-slave relationship.
The host can be used as a host transmitter or a host receiver.
If two or more hosts are initialized at the same time, data transmission can prevent data from being destroyed through
collision detection and arbitration.
BL702 includes an I2C controller host, which can be flexibly configured with slaveAddr, subAddr, and data transmission
to facilitate communication with slave devices. It provides 2 word depth fifo and provides interrupt functions. It can
be used with DMA to improve efficiency and flexibly adjust clock frequency.
11.2 I2C main features
• Support host mode
• Support multi-master mode and arbitration function
• Flexible clock frequency adjustment
11.3 I2C function description
Table 11.1: Pin lists
Name Type Description
I2Cx_SCL input/output I2C serial clock signal
I2Cx_SDA input/output I2C serial data signal
BL702/704/706 Reference Manual
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@2021 Bouffalo Lab
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