Bouffalo Lab BL702 - Clk_Cfg0

BL702/704/706 Reference Manual
Name
Description
GPIO_INT_MODE_SET2 GPIO interrupt mode set2
GPIO_INT_MODE_SET3 GPIO interrupt mode set3
GPIO_INT_MODE_SET4 GPIO interrupt mode set4
GPIO_INT2_MASK1 GPIO interrupt2 mask1
GPIO_INT2_STAT1 GPIO interrupt2 state1
GPIO_INT2_CLR1 GPIO interrupt2 clear1
GPIO_INT2_MODE_SET1 GPIO interrupt 2 mode set1
GPIO_INT2_MODE_SET2 GPIO interrupt 2 mode set2
GPIO_INT2_MODE_SET3 GPIO interrupt 2 mode set3
GPIO_INT2_MODE_SET4 GPIO interrupt 2 mode set4
led_driver Led driver
usb_xcvr USB configuration
usb_xcvr_config USB xcvr configuration
3.3.1 clk_cfg0
Address：0x40000000
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
RSVD BCLKDIV
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
HCLKDIV RCSEL PLLSEL BLCK
EN
HCLK
EN
FCLK
EN
PLL
EN
Bits
Name Type Reset Description
31:24 RSVD
23:16 BCLKDIV R/W 0 bclk divide from hclk
15:8 HCLKDIV R/W 0 hclk divide from root clock (clock source selected by hbn_-
root_clk_sel)
7:6 RCSEL R 0 root clock selection from HBN (0: RC32M 1: XTAL 2/3: PLL
others)
BL702/704/706 Reference Manual 40/ 375
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