BL702/704/706 Reference Manual
DMA Controller
DMA_Channel0
FIFO
src
dst
REQ0
REQ1
REQ31
««
««
DMA_Channel1
FIFO
src
dst
REQ0
REQ1
REQ31
««
««
DMA_Channe7
FIFO
src
dst
REQ0
REQ1
REQ31
««
««
AHB Master
AHB slave
Programming
AHB Slave
·
·
·
Fig. 6.1: DMA architecture
The DMA includes a set of AHB Master interfaces and a set of AHB Slave interfaces. The AHB Master interface actively
accesses memory or peripherals through the system bus according to the current configuration requirements, as a
port for data movement. The AHB Slave interface is used to configure the DMA interface and only supports 32-bit
access.
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