7
L1C
7.1 L1C introduction
L1 Cache Controller is a unit module located outside the processor, used to manage the code or data buffer on
Flash/pSRAM and improve the speed of CPU access to Flash/pSRAM. The architecture is as follows:
DTCM
48 KB
RISC
32-bit CPU
SF CTRL
Cache
/ITCM
4KB
4KB
4KB
4KB
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way
0
$
way
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$
way
2
$
way
3
L1C
Fig. 7.1: L1c architecture
L1C is a high-speed unit integrated between the processor and Flash. Because the speed of the processor is very fast,
when the processor needs to wait for a long time to access the Flash, the less time wasted, the higher the efficiency.
The L1C cache can be used as a lubricating role between the processor and the Flash to improve the efficiency of
the processor.
BL702/704/706 Reference Manual
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