BL702/704/706 Reference Manual
6.5.1 DMA_IntStatus
Address:0x4000c000
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
RSVD
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
RSVD INTSTA
Bits
Name Type Reset Description
31:8 RSVD
7:0 INTSTA R 0 Status of the DMA interrupts after masking
6.5.2 DMA_IntTCStatus
Address:0x4000c004
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
RSVD
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
RSVD INTTCSTA
Bits
Name Type Reset Description
31:8 RSVD
7:0 INTTCSTA R 0 Interrupt terminal count request status
6.5.3 DMA_IntTCClear
Address:0x4000c008
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
RSVD
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
RSVD TCRC
Bits
Name Type Reset Description
31:8 RSVD
7:0 TCRC W 0 Terminal count request clear
BL702/704/706 Reference Manual 129/ 375
@2021 Bouffalo Lab