BL702/704/706 Reference Manual
6.5.29 DMA_C2Config
Address：0x4000c310
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
RSVD HALT AC
TIVE
LOCK
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
TCIM IEM FLOWCTRL DSTPH SRCPH CHEN
Bits
Name Type Reset Description
31:19 RSVD
18 HALT R/W 0 Halt: 0 = enable DMA requests, 1 = ignore subsequent
source DMA requests.
17 ACTIVE R 0 Active: 0 = no data in FIFO of the channel, 1 = FIFO of the
channel has data.
16 LOCK R/W 0 Lock.
15 TCIM R/W 0 Terminal count interrupt mask.
14 IEM R/W 0 Interrupt error mask.
13:11 FLOWCTRL R/W 0 000: Memory-to-memory (DMA)
001: Memory-to-peripheral (DMA)
010: Peripheral-to-memory (DMA)
011: Source peripheral-to-Destination peripheral (DMA)
100: Source peripheral-to-Destination peripheral (Destina-
tion peripheral)
101: Memory-to-peripheral (peripheral)
110: Peripheral-to-memory (peripheral)
111: Source peripheral-to-Destination peripheral (Source
peripheral)
10:6 DSTPH R/W 0 Destination peripheral.
[23:22] GPADC
[21:18] I2S
[17:14] PDM
[13:10] SSP
[ 9: 6] I2C
[ 5: 0] UART
5:1 SRCPH R/W 0 Source peripheral.
0 CHEN R/W 0 Channel enable.
BL702/704/706 Reference Manual 142/ 375
@2021 Bouffalo Lab
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