9
SPI
9.1 SPI introduction
Serial Peripheral Interface Bus(SPI) is a synchronous serial communication interface specification for short-range com-
munication. Devices use full-duplex mode for communication. There is a master and one or more slaves. Requires
at least 4 wires, in fact 3 wires are also available (the one-way transmission), including SDI (data input), SDO (data
output), SCLK (clock), CS (chip select).
9.2 SPI main features
• Can be used as SPI master or SPI slave
• The transmit and receive channels each have a FIFO with a depth of 4 frames
• Both master and slave devices support 4 clock formats(CPOL,CPHA)
• Both master and slave devices support 1/2/3/4 byte transmission mode
• Flexible clock configuration, support up to 40M clock
• Configurable MSB/LSB priority transmission
• Acceptance filtering function
• Timeout mechanism under the slave
• Support DMA transfer mode
BL702/704/706 Reference Manual
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@2021 Bouffalo Lab
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