Bouffalo Lab BL702 - Page 229

BL702/704/706 Reference Manual
12.4.8 pwm1_clkdiv
Address：0x4000a440
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
RSVD
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
CLKDIV
Bits
Name Type Reset Description
31:16 RSVD
15:0 CLKDIV R/W 16’b0 PWM clock division
12.4.9 pwm1_thre1
Address：0x4000a444
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
RSVD
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
THRE1
Bits
Name Type Reset Description
31:16 RSVD
15:0 THRE1 R/W 16’b0 PWM first counter threshold, can’t be larger that pwm_thre2
12.4.10 pwm1_thre2
Address：0x4000a448
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
RSVD
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
THRE2
Bits
Name Type Reset Description
31:16 RSVD
BL702/704/706 Reference Manual 229/ 375
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