Bouffalo Lab BL702 - Page 268

BL702/704/706 Reference Manual
Bits
Name Type Reset Description
3 OFEN R/W 0 overflow interrupt enable
2 DREN R/W 0 double error interrupt enable
1 SREN R/W 0 sample interrupt enable
0 RREN R/W 1 report interrupt enable
14.4.5 qdec0_int_sts
Address：0x4000a814
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
RSVD
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
RSVD OF
STS
DR
STS
SR
STS
RR
STS
Bits
Name Type Reset Description
31:4 RSVD
3 OFSTS R 0 ACC1 or ACC2 overflow
2 DRSTS R 0 ACC2 double error
1 SRSTS R 0 Event being generated for every new sample value written
to the SAMPLE register
0 RRSTS R 0 Non-null report ready
14.4.6 qdec0_int_clr
Address：0x4000a818
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
RSVD
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
RSVD OFCL DRCL SRCL RRCL
Bits
Name Type Reset Description
31:4 RSVD
3 OFCL W1C 0 overflow interrupt clear
BL702/704/706 Reference Manual 268/ 375
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