BL702/704/706 Reference Manual
17.8.3 INT_MASK
Address:0x4000d008
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
RSVD
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
RSVD RXCM TXCM BM RXEM RXBM TXEM TXBM
Bits
Name Type Reset Description
31:7 RSVD
6 RXCM R/W 1’b1 Receive control frame mask ENABLE
0: Interrupt is un-masked
1: Interrupt is masked
5 TXCM R/W 1’b1 Transmit control frame mask ENABLE
0: Interrupt is un-masked
1: Interrupt is masked
4 BM R/W 1’b1 Busy mask ENABLE
0: Interrupt is un-masked
1: Interrupt is masked
3 RXEM R/W 1’b1 Receive error mask ENABLE
0: Interrupt is un-masked
1: Interrupt is masked
2 RXBM R/W 1’b1 Receive frame mask ENABLE
0: Interrupt is un-masked
1: Interrupt is masked
1 TXEM R/W 1’b1 Transmit error mask ENABLE
0: Interrupt is un-masked
1: Interrupt is masked
0 TXBM R/W 1’b1 Transmit buffer mask ENABLE
0: Interrupt is un-masked
1: Interrupt is masked
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