Bouffalo Lab BL702 - Page 355

BL702/704/706 Reference Manual
Bits
Name Type Reset Description
14 POFFVRT R/W 0 Set 1 to disable power off VDDCORE_RT at HBN mode (for
low power)
13 POFFVCOR R/W 0 Set 1 to disable power off VDDCORE at HBN mode (for
debug)
12 SRST R/W 0 soft reset
11 POFFHRTC R/W 0 Power Off HBN RTC @ Enter hibernate
10 RSVD
9 POFFHCOR R/W 0 Power Off HBN Core @ Enter hibernate
8 TRPM R 0 Boot Strap 0: Flash, 1: UART or SDIO
7 HBNM W 0 Enter hibernate
6:0 RTCCTL R/W 7’h0 [6:4] Slow LED, x/0.25/0.5/1/2/4/8/16 seconds
[3] rtc long time 0 353days (bit 39 13 compare)
[2] rtc short time 0 488s (bit 23 0 compare)
[1] rtc time 0 353days (bit 39 0 compare)
[0] rtc enable
19.4.2 HBN_TIME_L
Address：0x4000f004
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
HBNTIML
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
HBNTIML
Bits
Name Type Reset Description
31:0 HBNTIML R/W 32’h0 RTC timer compare bit 31:0
19.4.3 HBN_TIME_H
Address：0x4000f008
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
RSVD
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
RSVD HBNTIMH
BL702/704/706 Reference Manual 355/ 375
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