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HIMA H41q - Page 86

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B 4237-1/-2 / H41q-HS/HRS (0605)
80
e.g. F 8627X (Ethernet) or F 8628X (Profibus DP)
H41q-HS / B 4237-1: max. 13 IO modules (slots 1 - 13)
H41q-HRS / B 4237-2:
7 IO modules (slots 1- 7) related to central module 1
6 IO modules (slots 8 - 13) related to central module 2
2 Modules
2.1 Central module F 8652X
The central module for safety related applications with TÜV certificate of the PES H41q-HS/
HRS contains the essential functions demonstrated in the block diagram of the central module:
Figure 2: Block diagram of the central module F 8652X
two clock-synchronized microprocessors
each microprocessor with an own memory, one processor operates with real data and pro-
gram and the other one with inverted data and program
testable hardware comparer for all the external accesses of both microprocessors, in case
of a fault the watchdog will be set to the safe status and the status of the processor is
announced
Flash-EPROMs of the program memory for the operating system and the user program
usable for min. 100,000 writing cycles
Data memory in sRAM
Multiplexer to connect I/O bus, DPR and redundant CU
Battery backup of the sRAMs via batteries with monitoring
Note Operating system/resource type in ELOP II
The assembly kit is usable since operating system BS41q/51q V7.0-8.
Resource type in ELOP II: H41qce-HS/H41qce-HRS.
Watchdog

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