6
FUNCTIONS
6.11 Monitor Function
6.11.3 Enforced ON/OFF of external I/O
6
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1
Overview
2
Performance
Specification
3
Sequence Program
Configuration and
Execution Conditions
4
I/O Nunber Assignment
5
Memories and Files
Handled by CPU Module
6
Functions
7
Communication with
Intelligent Function
Module
8
Parameters
(e) Enforced ON/OFF timing for external I/O
The timing for external I/O enforced ON/OFF is shown in Table6.19.
(f) Number of devices that can be registered
Note6.16
Note16
A total of thirty-two devices can be registered for enforced ON and OFF.
(g) When output Y contact is used in sequence program
Sequence program operations take precedence when used with an output Y
contact.
(h) Checking enforced ON/OFF and cancellation conditions
Note6.16
The enforced ON/OFF and cancellation (including non setting) can be checked by
GX Developer.
If at least one device has been registered, the condition can be checked by the
MODE LED. (The MODE LED flickers.)
Note6.17
Note17
(i) Enforced ON/OFF from multiple GX Developers
Note6.16
It is possible to register enforced ON/OFF for external I/O in the same CPU
module from multiple GX Developers connected to the network.
However, when enforced ON/OFF is registered in the same device from multiple
GX Developers, it will assume the most recent registered ON/OFF status.
GX Developer that executed enforced ON/OFF first may display the ON/OFF
information different from that of the CPU module.
When performing enforced ON/OFF from multiple GX Developers, ensure that the
most up-to-date information is set with the "Load Registration Status" switch
before executing the enforced ON/OFF procedure.
Table6.19 Enforced ON/OFF timing
Refresh area Input Output
I/O modules on the base
unit (X, Y)
• During END processing (input refresh)
• During the execution of commands that
used direct access input (DX) (LD, LDI,
AND, ANI, OR, ORI, LDP, LDF, ANDP,
ANDF, ORP, ORF)
• During END processing (output refresh)
• During the execution of commands that
used direct access output (DY) (OUT,
SET, DELTA, RST, PLS, PLF, FF, LDF,
MC)
I/O of CPU module to be
refreshed from LX, LY of
MELSECNET/H
• During END processing (MELSECNET/H refresh)
• During execution of the COM instruction
• During execution of the ZCOM instruction
I/O of CPU module to be
refreshed from RX, RY of
CC-Link
• During END processing (CC-Link refresh)
• During execution of the COM instruction
• During execution of the ZCOM instruction
Note16
Note17
Basic
Note6.16
The enforced ON registration and enforced OFF registration cannot be executed for
Basic model QCPU by selecting [Online] [Debug] [Forced input output
registration/cancellation] (
(3) in this section). This operation can be executed for Basic
model QCPU by conducting device test with GX Developer.
Basic
Note6.16
Basic
Note6.16
Note6.17
Redundant
In the case of the Redundant system, the MODE LEDs of the Redundant CPUs in both systems
flicker.
Note6.17
Redundant
Basic
Note6.16
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