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Inverter Positioning Section 5-3
5-3-10 Memory Allocations
Built-in Input Area
Note (1) The above table shows only allocations related to inverter positioning.
(2) Bits 08 to 11 are not supported by CPU Units with 14 I/O Points. Bits 06
to 11 are not supported by CPU Units with 10 I/O Points.
(3) If inverter positioning 1 is used with a CPU Unit with 14 I/O Points, origin
searches (i.e., the origin proximity input signal) cannot be used.
Built-in Output Area This area is not used for inverter positioning.
When inverter positioning is enabled, bits 00 to 03 in CIO 100 can be used as
normal outputs 0 to 3. The corresponding pulse output and PWM output can-
not be used.
Input terminal block Default Pulse output origin searches enabled Inverter positioning
enabled
Word Bit Normal inputs Origin search
CIO 0
(See note 1.)
00 Normal input 0 --- High-speed counter 0:
Phase A
01 Normal input 1 --- High-speed counter 0:
Phase B
02 Normal input 2 Pulse output 0: Origin proximity input signal
(CPU Units with 14 I/O (See note 3.))
High-speed counter 1:
Phase A
03 Normal input 3 Pulse output 1: Origin proximity input signal
(CPU Units with 14 I/O (See note 3.))
Pulse output 0: Origin proximity input signal
(CPU Units with 10 I/O (See note 3.))
High-speed counter 1:
Phase B
04 Normal input 4 --- ---
05 Normal input 5 Pulse output 0: Origin input signal (CPU
Units with 10 I/O (See note 3.))
---
06(See note 2.) Normal input 6 Pulse output 0: Origin input signal ---
07(See note 2.) Normal input 7 Pulse output 1: Origin input signal ---
08 (See note 2.) Normal input 8 --- ---
09 (See note 2.) Normal input 9 --- ---
10 (See note 2.) Normal input 10 Pulse output 0: Origin proximity input signal
(CPU Units with 20, 30,40 or 60 I/O)
---
11 (See note 2.) Normal input 11 Pulse output 1: Origin proximity input signal
(CPU Units with 20, 30,40 or 60 I/O)
---
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