Philips LPC2129 - Page 191

CAN Controllers and Acceptance Filter 191 May 03, 2004
Philips Semiconductors Preliminary User Manual
LPC2119/2129/2292/2294ARM-based Microcontroller
In the following register tables, the column “Reset Value” shows how a hardware reset affects each bit or field, while the column
“RM Set” indicates how each bit or field is affected if software sets the RM bit, or RM is set because of a Bus-Off condition. Note
that while hardware reset sets RM, in this case the setting noted in the “Reset Value” column prevails over that shown in the “RM
Set” column, in the few bits where they differ. In both columns, X indicates the bit or field is unchanged.
CANTDB1 Transmit data bytes 5-8 (1) R/W
0xE004 403C
C1TDB1
0xE004 803C
C2TDB1
0xE004 C03C
C3TDB1
0xE005 003C
C4TDB1
CANTFI2 Transmit frame info (2) R/W
0xE004 4040
C1TFI2
0xE004 8040
C2TFI2
0xE004 C040
C3TFI2
0xE005 0040
C4TFI2
CANTID2 Transmit Identifier (2) R/W
0xE004 4044
C1TID2
0xE004 8044
C2TID2
0xE004 C044
C3TID2
0xE005 0044
C4TID2
CANTDA2 Transmit data bytes 1-4 (2) R/W
0xE004 4048
C1TDA2
0xE004 8048
C2TDA2
0xE004 C048
C3TDA2
0xE005 0048
C4TDA2
CANTDB2 Transmit data bytes 5-8 (2) R/W
0xE004 404C
C1TDB2
0xE004 804C
C2TDB2
0xE004 C04C
C3TDB2
0xE005 004C
C4TDB2
CANTFI3 Transmit frame info (3) R/W
0xE004 4050
C1TFI3
0xE004 8050
C2TFI3
0xE004 C050
C3TFI3
0xE005 0050
C4TFI3
CANTID3 Transmit Identifier (3) R/W
0xE004 4054
C1TID3
0xE004 8054
C2TID3
0xE004 C054
C3TID3
0xE005 0054
C4TID3
CANTDA3 Transmit data bytes 1-4 (3) R/W
0xE004 4058
C1TDA3
0xE004 8058
C2TDA3
0xE004 C058
C3TDA3
0xE005 0058
C4TDA3
CANTDB3 Transmit data bytes 5-8 (3) R/W
0xE004 405C
C1TDB3
0xE004 805C
C2TDB3
0xE004 C05C
C3TDB3
0xE005 005C
C4TDB3
a. The error counters can only be written when RM in CANMOD is 1.
b. These registers can only be written when RM in CANMOD is 1.
Table 124: CAN1, CAN2, CAN3 and CAN4 Controller Register Map
Generic
Register
Name
Description Access
CAN1
Address &
Name
CAN2
Address &
Name
CAN3
Address &
Name
CAN4
Address &
Name