Philips LPC2129 - Table 16: External Interrupt Wakeup Register (EXTWAKE - 0 Xe01 Fc144); Table 17: External Interrupt Mode Register (EXTMODE - 0 Xe01 Fc148)

System Control Block 71 May 03, 2004
Philips Semiconductors Preliminary User Manual
LPC2119/2129/2194/2292/2294ARM-based Microcontroller
External Interrupt Mode Register (EXTMODE - 0xE01FC148)
The bits in this register select whether each EINT pin is level- or edge-sensitive. Only pins that are selected for the EINT function
(chapter Pin Connect Block on page 126) and enabled via the VICIntEnable register (chapter Vectored Interrupt Controller (VIC)
on page 96) can cause interrupts from the External Interrupt function (though of course pins selected for ) other functions may
cause interrupts from those functions).
Note: Software should only change a bit in this register when its interrupt is disabled in VICIntEnable, and should write
the corresponding 1 to EXTINT before re-enabling the interrupt, to clear the EXTINT bit that could be set by changing
the mode.
External Interrupt Polarity Register (EXTPOLAR - 0xE01FC14C)
In level-sensitive mode, the bits in this register select whether the corresponding pin is high- or low-active. In edge-sensitive
mode, they select whether the pin is rising- or falling-edge sensitive. Only pins that are selected for the EINT function (chapter
Pin Connect Block on page 126) and enabled in the VICIntEnable register (chapter Vectored Interrupt Controller (VIC) on page
96) can cause interrupts from the External Interrupt function (though of course pins selected for other functions may cause
interrupts from those functions).
Note: Software should only change a bit in this register when its interrupt is disabled in VICIntEnable, and should write
the corresponding 1 to EXTINT before re-enabling the interrupt, to clear the EXTINT bit that could be set by changing
the polarity.
Table 16: External Interrupt Wakeup Register (EXTWAKE - 0xE01FC144)
EXTWAKE Function Description
Reset
Value
0 EXTWAKE0 When one, assertion of EINT0
will wake up the processor from Power Down mode. 0
1 EXTWAKE1 When one, assertion of EINT1
will wake up the processor from Power Down mode. 0
2 EXTWAKE2 When one, assertion of EINT2
will wake up the processor from Power Down mode. 0
3 EXTWAKE3 When one, assertion of EINT3 will wake up the processor from Power Down mode. 0
7:4 Reserved
Reserved, user software should not write ones to reserved bits. The value read
from a reserved bit is not defined.
NA
Table 17: External Interrupt Mode Register (EXTMODE - 0xE01FC148)
EXTMODE Function Description
Reset
Value
0 EXTMODE0 When 0, level-sensitivity is selected for EINT0. When 1, EINT0 is edge-sensitive. 0
1 EXTMODE1 When 0, level-sensitivity is selected for EINT1. When 1, EINT1 is edge-sensitive. 0
2 EXTMODE2 When 0, level-sensitivity is selected for EINT2. When 1, EINT2 is edge-sensitive. 0
3 EXTMODE3 When 0, level-sensitivity is selected for EINT3. When 1, EINT3 is edge-sensitive. 0
7:4 Reserved
Reserved, user software should not write ones to reserved bits. The value read
from a reserved bit is not defined.
NA