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Introduction 27 May 03, 2004
Philips Semiconductors Preliminary User Manual
LPC2119/2129/2194/2292/2294ARM-based Microcontroller
0xE0014050
PWM
LER
PWM Latch
Enable
Register
-
Ena.
PWM
M6
Latch
Ena.
PWM
M5
Latch
Ena.
PWM
M4
Latch
Ena.
PWM
M3
Latch
Ena.
PWM
M2
Latch
Ena.
PWM
M1
Latch
Ena.
PWM
M0
Latch
R/W 0
I
2
C
0xE001C000
I2CONS
ET
I
2
C Control
Set Register
-I2ENSTASTOSIAA - -R/W0
0xE001C004 I2STAT
I
2
C Status
Register
5 bit Status 0 0 0 RO 0xF8
0xE001C008 I2DAT
I
2
C Data
Register
8 bit data R/W 0
0xE001C00C
I2
ADR
I
2
C Slave
Address
Register
7 bit data GC R/W 0
0xE001C010
I2
SCLH
SCL Duty
Cycle
Register High
Half Word
16 bit data R/W 0x04
0xE001C014
I2
SCLL
SCL Duty
Cycle
Register Low
Half Word
16 bit data R/W 0x04
0xE001C018
I2CONC
LR
I
2
C Control
Clear
Register
- I2ENC STAC - SIC AAC - -WONA
SPI0
0xE0020000
S0
SPCR
SPI0 Control
Register
SPIE LSBF MSTR CPOL CPHA
- - -R/W0
0xE0020004
S0
SPSR
SPI0 Status
Register
SPIF WCOL ROVR MODF ABRT - - -RO0
0xE0020008
S0
SPDR
SPI0 Data
Register
8 bit data R/W 0
0xE002000C
S0
SPCCR
SPI0 Clock
Counter
Register
8 bit data R/W 0
0xE002001C
S0
SPINT
SPI0
Interrupt Flag
- - - - - - -
SPI
Int.
R/W 0
SPI1
0xE0030000
S1
SPCR
SPI1 Control
Register
SPIE LSBF MSTR CPOL CPHA
- - -R/W0
Table 2: LPC2119/2129/2194/2292/2294 Registers
Address
Offset
Name Description MSB LSB Access
Reset
Value

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