19. Programmable I/O Ports
puorG92/C61M
page 319
854fo7002,03.raM21.1.veR
2110-1010B90JER
Figure 19.2 I/O Ports (2)
P8
2
to P8
4
P3
1
, P6
2
, P6
6
, P7
7
Data bus
Pull-up selection
Direction register
Port latch
Data bus
Pull-up selection
Direction register
Port latch
Input to respective peripheral functions
Input to respective peripheral functions
P2
0
, P2
1
, P7
0
to P7
3
"1"
Output
Data bus
Direction
register
Port latch
Pull-up selection
(1)
Input to respective peripheral functions
Switching
between
CMOS and
Nch
(1)
(1)
NOTE:
1. symbolizes a parasitic diode.
Make sure the input voltage on each port will not exceed Vcc.
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