Schweitzer Engineering Laboratories SEL-387E - 50 Nn1 Residual Definite-Time Element; 50 Qn1 and 50 Nn1 - Sequence Current Definite-Time Element Logic; 50 Qn1 Negative-Sequence Definite-Time Element

3-38 Protection Functions Date Code 20080110
SEL-387E Instruction Manual
If the curve times out, Relay Word bit 51P n T asserts. When all phase currents drop below
pickup, with or without a curve time-out, 51P
n deasserts and the element resets according to
setting 51P
n RS. At the completion of the reset, Relay Word bit 51P n R asserts. This bit normally
will be at logic state 1, when the element is at rest during normal system operation. Use the
TAR
command via a serial port or the front panel to verify the state of this bit. You can use the
Level 2 serial port command
RES or the front-panel RESET51 function under the OTHER button
to force this bit to logical 1 during element testing. This saves time if you have chosen
electromechanical reset.
50Qn1 and 50Nn1 – Sequence Current Definite-Time Element Logic
Figure 3.19 shows the logic for the definite-time 50Q n 1 negative-sequence element and the
definite-time 50N
n 1 residual element.
Figure 3.19: 50Qn1 and 50Nn1 Sequence Definite-Time O/C Element, Torque Controlled
50Qn1 Negative-Sequence Definite-Time Element
The 50Q n 1 element logic compares the magnitude of calculated negative-sequence current
3I2W
n to pickup setting 50Q n 1P. If the calculated negative-sequence current magnitude exceeds
the pickup level, a logical 1 asserts at one input to the AND gate at the center. The torque-control
SEL
OGIC control equation, 50Q n 1TC, determines the other AND input. If 50Q n 1TC is true,
Relay Word bit 50Q
n 1 asserts and the timer starts. After the time specified by delay setting
50Q
n 1D has expired, a second Relay Word bit, 50Q n 1T, asserts. The 50Q n 1T bit asserts only if
the 50Q
n 1 bit remains asserted for the duration of 50Q n 1D. When 50Q n 1 deasserts, the timer
resets without delay, along with 50Q
n 1T if it has asserted.
50Nn1 Residual Definite-Time Element
The 50N n 1 element logic compares the magnitude of the calculated residual current, IRW n , to the
pickup setting, 50N
n 1P. If the calculated residual current magnitude exceeds the pickup level, a
logical 1 asserts at one input to the AND gate at the center. The torque-control SEL
OGIC control
equation, 50N
n 1TC, determines the other AND input. If 50N n 1TC is true, Relay Word bit
50N
n 1 asserts and the timer starts. After the time specified by delay setting 50N n 1D has expired,
a second Relay Word bit, 50N
n 1T, asserts. The 50N n 1T bit asserts only if the 50N n 1 bit remains
asserted for the duration of 50N
n 1D. When 50N n 1 deasserts, the timer resets without delay,
along with 50N
n 1T if it has asserted.