Sun Microsystems Ultra 25 - Page 140

11-10 Sun Ultra 45 and Ultra 25 Workstations Service and Diagnostics Manual • May 2006
0>FPU Block Register Test
0>FPU Branch Instructions
0>FPU Functional Test
Additional FPU testing is
performed.
0>Scrub Memory
Memory is set to zero.
0>Flush Caches
Caches are set to zero.
0>Functional CPU Tests.....
0>L2-Cache Functional
0>L2-Cache Stress
0>IMMU Functional
0>DMMU Functional
0>I-Cache Functional
0>I-Cache Parity Functional
0>I-Cache Parity Tag
0>I-Cache Snoop Parity Tag
0>D-Cache Functional
0>D-Cache Parity Functional
0>D-Cache Parity Tag Test
0>W-Cache Functional
0>Graphics Functional
0>CPU Superscalar Dispatch
0>SPARC Atomic Instruction Test
0>Non SPARC Atomic Instruction Test
0>SOFTINT Register and Interrupt Test
0>Branch Memory Test
0>Fast ECC test
0>System ECC test
CPU functional checks are
executed.
0>XBus SRAM
On-board SRAM is checked.
0>IO-Bridge Quick Read
0>
TABLE 11-6 post max max Output Comparison (Continued)
Output Displayed What Is Happening