Xilinx Virtex-5 RocketIO GTP

26 www.xilinx.com Virtex-5 RocketIO GTP Transceiver User Guide
UG196 (v1.3) May 25, 2007
Chapter 1: Introduction to the RocketIO GTP Transceiver
R
RXBUFRESET0
RXBUFRESET1
In Async Resets the RX buffer logic.
Reset (page 73),
Configurable RX Elastic
Buffer and Phase
Alignment (page 162),
Configurable Clock
Correction (page 169)
RXBUFSTATUS0[2:0]
RXBUFSTATUS1[2:0]
Out RXUSRCLK2
Indicates the overflow/underflow
status of the RX buffer.
Configurable RX Elastic
Buffer and Phase
Alignment (page 162),
Configurable Clock
Correction (page 169)
RXBYTEISALIGNED0
RXBYTEISALIGNED1
Out RXUSRCLK2
Indicates if the parallel data stream is
properly aligned on byte boundaries
according to comma detection.
When PCOMMA_ALIGN = TRUE,
asserted for alignment to PCOMMA
value.
When MCOMMA_ALIGN = TRUE,
asserted for alignment to MCOMMA
value.
Configurable Comma
Alignment and
Detection (page 149)
RXBYTEREALIGN0
RXBYTEREALIGN1
Out RXUSRCLK2
Indicates if the byte alignment within
the serial data stream has changed due
to a comma detection.
Configurable Comma
Alignment and
Detection (page 149)
RXCDRRESET0
RXCDRRESET1
In RXUSRCLK2
Reset for the RX CDR. Also resets the
rest of the RX PCS.
Reset (page 73), RX
Clock Data Recovery
(CDR) (page 136)
RXCHANBONDSEQ0
RXCHANBONDSEQ1
Out RXUSRCLK2
Indicates when RXDATA contains the
start of a channel bonding sequence.
Configurable Channel
Bonding (Lane Deskew)
(page 176)
RXCHANISALIGNED0
RXCHANISALIGNED1
Out RXUSRCLK2
Indicates if the channel is properly
aligned with the master transceiver
according to observed channel bonding
sequences in the data stream
Configurable Channel
Bonding (Lane Deskew)
(page 176)
RXCHANREALIGN0
RXCHANREALIGN1
Out RXUSRCLK2
Held High for at least one cycle when
the receiver has changed.
Configurable Channel
Bonding (Lane Deskew)
(page 176)
RXCHARISCOMMA0[1:0]
RXCHARISCOMMA1[1:0]
Out RXUSRCLK2
Asserted when RXDATA is an 8B/10B
comma.
Configurable 8B/10B
Decoder (page 157)
RXCHARISK0[1:0]
RXCHARISK1[1:0]
Out RXUSRCLK2
Asserted when RXDATA is an 8B/10B
K character.
Configurable 8B/10B
Decoder (page 157)
RXCHBONDI0[2:0]
RXCHBONDI1[2:0]
In RXUSRCLK
FPGA channel bonding control. Used
only by slaves.
Configurable Channel
Bonding (Lane Deskew)
(page 176)
Table 1-3: GTP_DUAL Port Summary (Continued)
Port Dir Domain Description Section (Page)