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BL702/704/706 Reference Manual
Bits
Name Type Reset Description
31:8 RSVD
7 STOPSTA R 1’b0 PWM stop status
6 STOPEN R/W 1’b0 PWM stop enable
5 SWMODE R/W 1’b0 PWM SW Mode setting
4 SWFVAL R/W 1’b0 PWM SW Mode force value
3 STOPMODE R/W 1’b1 PWM stop mode, 1’b1 - graceful ; 1’b0 - abrupt
2 OUTINV R/W 1’b0 PWM invert output mode
1:0 CLKSEL R/W 2’d0 PWM clock source select, 2’b00-xclk ; 2’b01-bclk ; others-
f32k_clk
12.4.25 pwm3_interrupt
Address0x4000a494
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
RSVD INT
EN
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
INTPECN
Bits
Name Type Reset Description
31:17 RSVD
16 INTEN R/W 1’b0 PWM interrupt enable
15:0 INTPECN R/W 16’d0 PWM interrupt period counter threshold
12.4.26 pwm4_clkdiv
Address0x4000a4a0
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
RSVD
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
CLKDIV
BL702/704/706 Reference Manual 236/ 375
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