BL702/704/706 Reference Manual
13.4.24 WICR
Address:0x4000a580
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
RSVD
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
RSVD WI
CLR
Bits
Name Type Reset Description
31:1 RSVD
0 WICLR W 1’b0 WDT Interrupt clear register
13.4.25 TCER
Address:0x4000a584
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
RSVD
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
RSVD TIM3
EN
TIM2
EN
RSVD
Bits
Name Type Reset Description
31:3 RSVD
2 TIM3EN R/W 1’b0 Timer3 count enable
1 TIM2EN R/W 1’b0 Timer2 count enable
0 RSVD
13.4.26 TCMR
Address:0x4000a588
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
RSVD
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
RSVD TIM3
MODE
TIM2
MODE
RSVD
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