BL702/704/706 Reference Manual
Bits
Name Type Reset Description
29:28 SPLVAL R 0 Sample value. Direction of last change
00: no change
01: clockwise
11: counter-clockwise
10: Error
27:20 RSVD
19:16 ACC2VAL R 0 Double error accumulation (0 15)
15:0 ACC1VAL R 0 Sample accumulation (-32768 32767)
clockwise +1, counter-clockwise -1
14.4.10 qdec1_int_en
Address:0x4000a850
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
RSVD
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
RSVD OFEN DREN SREN RREN
Bits
Name Type Reset Description
31:4 RSVD
3 OFEN R/W 0 overflow interrupt enable
2 DREN R/W 0 double error interrupt enable
1 SREN R/W 0 sample interrupt enable
0 RREN R/W 1 report interrupt enable
14.4.11 qdec1_int_sts
Address:0x4000a854
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
RSVD
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
RSVD OF
STS
DR
STS
SR
STS
RR
STS
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