Bouffalo Lab BL702 - Page 272

BL702/704/706 Reference Manual
Bits
Name Type Reset Description
31:4 RSVD
3 OFSTS R 0 ACC1 or ACC2 overflow
2 DRSTS R 0 ACC2 double error
1 SRSTS R 0 Event being generated for every new sample value written
to the SAMPLE register
0 RRSTS R 0 Non-null report ready
14.4.12 qdec1_int_clr
Address：0x4000a858
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
RSVD
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
RSVD OFCL DRCL SRCL RRCL
Bits
Name Type Reset Description
31:4 RSVD
3 OFCL W1C 0 overflow interrupt clear
2 DRCL W1C 0 double error interrupt clear
1 SRCL W1C 0 sample interrupt clear
0 RRCL W1C 0 report interrupt clear
14.4.13 qdec2_ctrl0
Address：0x4000a880
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
RSVD RPT
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
RPT SPL DEGCNT DEG
EN
LED
POL
LED
EN
QDEC
EN
Bits
Name Type Reset Description
31:28 RSVD
BL702/704/706 Reference Manual 272/ 375
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