Bouffalo Lab BL702 - Page 288

BL702/704/706 Reference Manual
Bits
Name Type Reset Description
6:4 DEGCNT R/W 3’d0 Deglitch cycle count (unit: cycle of I2S kernel clock)
3’d0: 1 cycle
3’d1: 2 cycles
…
3 BCLKINV R/W 1’b0 Inverse BCLK signal
0: No inverse, 1: Inverse
2 FSINV R/W 1’b0 Inverse FS signal
0: No inverse, 1: Inverse
1 RXDINV R/W 1’b0 Inverse RXD signal
0: No inverse, 1: Inverse
0 TXDINV R/W 1’b0 Inverse TXD signal
0: No inverse, 1: Inverse
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