17
Emac
17.1 Emac introduction
The EMAC module is a 10/100Mbps Ethernet MAC (Ethernet Media Access Controller) compatible with IEEE 802.3.
It includes status and control register group, transceiver module, transceiver buffer descriptor group, host interface,
MDIO, physical layer chip (PHY) interface.
The status and control register group contains the status bits and control bits of the EMAC, which is the interface with
the user program, and is responsible for controlling data receiving and sending and reporting the status.
The transceiver module is responsible for obtaining the data frame from the designated memory location according
to the control word in the transceiver descriptor, adding the preamble, CRC, and expanding the short frame before
sending it out through the PHY; Or receive data from the PHY, and put the data into the designated memory according
to the transmit and receive buffer descriptor. Configure related event flags after sending and receiving. If the event
interrupt is enabled, the interrupt request will be sent to the host for processing.
The MDIO and MII/RMII interfaces are responsible for communicating with the PHY, including reading and writing
PHY registers and sending and receiving data packets.
17.2 Emac main features
• Compatible with the MAC layer functions defined by IEEE 802.3
• Support MII and RMII interface PHY defined by IEEE 802.3
• Interaction with PHY through MDIO
• Support 10Mbps and 100Mbps Ethernet
• Support half duplex and full duplex
• In full duplex mode, support automatic flow control and control frame generation
• Support collision detection and retransmission in half-duplex mode
BL702/704/706 Reference Manual
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@2021 Bouffalo Lab
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