BL702/704/706 Reference Manual
Bits
Name Type Reset Description
23 RSVD
22:16 TXBDPTR R 7’h0 TX buffer descriptors (BD) pointer, pointing at the TXBD
currently being used
15:8 RSVD
7:0 TXBDNUM R/W 8’h40 TX buffer descriptors (BD) number
Number of TX BD. TX and RX share 128 (0x80) descriptors,
so the number of RX BD equals 0x80 - TXBDNUM.
The maximum number of TXBDNUM is 0x80. Values
greater then 0x80 cannot be written into this register.
17.8.8 MIIMODE
Address:0x4000d028
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
RSVD
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
RSVD MINO
PRE
CLKDIV
Bits
Name Type Reset Description
31:9 RSVD
8 MINOPRE R/W 1’b0 No preamble for Management Data (MD)
0: 32-bit preamble will be sent.
1: No preamble will be sent.
7:0 CLKDIV R/W 8’h64 Clock divider for Management Data Clock (MDC)
The source clock is bus clock and can be divided by any
even number.
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