Bouffalo Lab BL702 - Page 359

BL702/704/706 Reference Manual
19.4.9 HBN_PIR_CFG
Address：0x4000f020
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
RSVD
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
RSVD NO
SYNC
CGEN PIR
EN
RSVD PIRDIS RSVD LPF
SEL
HPFSEL
Bits
Name Type Reset Description
31:10 RSVD
9 NOSYNC R/W 0 gpadc no sync
8 CGEN R/W 0 gpadc force cgen=1
7 PIREN R/W 0 pir enable
6 RSVD
5:4 PIRDIS R/W 0 pir disable
[4] low -> high won’t trigger interrupt
[5] high -> low won’t trigger interrupt
3 RSVD
2 LPFSEL R/W 0 0: /1. 1:/2
1:0 HPFSEL R/W 0 0: 1-z-1, 1: 1-z-2, 0: 2-z-3
19.4.10 HBN_PIR_VTH
Address：0x4000f024
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
RSVD
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
RSVD PIRVYH
Bits
Name Type Reset Description
31:14 RSVD
13:0 PIRVYH R/W 14’h3ff PIR compare threshold
BL702/704/706 Reference Manual 359/ 375
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