BL702/704/706 Reference Manual
Bits
Name Type Reset Description
6 RSVD
5 FBLEISO R/W 0 manual force BZ_BLE iso_en
4:3 RSVD
2 FBLEPWOF R/W 0 manual force BZ_BLE pwr_off
1 FMISPWOF R/W 0 manual force MISC pwr_off
0 RSVD
19.5.6 PDS_CTL4
Address
：
0x4000e018
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
MISC
DPOF
MISC
APOF
RSVD MISC
GCLK
MISC
MSTB
MISC
RST
MISC
PWOF
USB
GCLK
USB
MSTB
USB
RST
USB
PWOF
BLE
GCLK
BLE
MSTB
BLE
RST
BLE
PWOF
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
BZ
GCLK
BZ
MSTB
BZ
RST
BZ
PWOF
RSVD NP
GCLK
NP
MSTB
NP
RST
NP
PWOF
Bits
Name Type Reset Description
31 MISCDPOF R/W 1 Use with bit[27] cr_pds_misc_pwr_off , if cr_pds_misc_-
pwr_off =1, this bit :
1: Power Off PD_CORE_MISC_DIG when pds_state run at
Power OFF
0 :Power On PD_CORE_MISC_DIG when pds_state run at
Power OFF
30 MISCAPOF R/W 1 Use with bit[27] cr_pds_misc_pwr_off , if cr_pds_misc_-
pwr_off =1, this bit :
1: Power Off PD_CORE_MISC_ANA when pds_state run
at Power OFF
0 :Power On PD_CORE_MISC_ANA when pds_state run
at Power OFF
29:28 RSVD
27 MISCGCLK R/W 1 1 : make core_misc clock gated at PDS Sleep state
0 : make core_misc clocking at PDS Sleep state
26 MISCMSTB R/W 1 1 : make core_misc RAM @Retention at PDS Sleep state
0 : make core_misc RAM @ Normal at PDS Sleep state
25 MISCRST R/W 1 1 : make core_misc reset at PDS Sleep state
0 : make core_misc not reset at PDS Sleep state
BL702/704/706 Reference Manual 369/ 375
@2021 Bouffalo Lab
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