BL702/704/706 Reference Manual
In single-ended mode, there is no sign bit, that is, when 12 bits are selected, bit15-bit4 is the conversion result and
bit15 is the MSB.
In actual use, the results of the ADC are generally placed in the FIFO, which is particularly important in the multi-
channel scan mode. Therefore, users generally obtain conversion results from the ADC FIFO. The data format of the
ADC FIFO is the same in the gpadc_data_out register.
4.3.6 ADC interrupt
The ADC module can generate interrupts when the positive sampling is saturated and the negative sampling is satu-
rated. The respective interrupts can be masked by gpadc_pos_satur_mask, gpadc_neg_satur_mask.
When the interrupt is generated, the interrupt status can be queried by the gpadc_pos_satur, and gpadc_neg_satur
registers, and the interrupt can be cleared by gpadc_pos_satur_clr and gpadc_neg_satur_clr. This function can be
used to determine whether the input voltage is abnormal.
4.3.7 ADC FIFO
The ADC module has a FIFO with a depth of 32 and a data width of 26Bits. After the ADC completes the conversion,
it will automatically push the result into the FIFO. The ADC’s FIFO has the following status and interrupt management
functions:
• FIFO Overrun interrupt
• FIFO Underrun interrupt
• FIFO threshold interrupt
When the FIFO is full, but the user does not read the value through DMA or direct access to the register, and data
enters the FIFO again, the module will generate a FIFO Overrun interrupt at this time.
When the FIFO is empty, but the user still requests data from the FIFO, the module will generate a FIFO Underrun
interrupt at this time.
The user can configure the FIFO threshold register gpadc_fifo_thl, select the threshold for FIFO to generate interrupts,
and choose 1, 4, 8, and 16. If the number of ADC FIFOs reaches the set threshold, a threshold interrupt will be
generated.
When an interrupt occurs, the interrupt flag can be cleared by the corresponding clear bit.
Using the ADC’s FIFO, users can implement three modes of data acquisition: query mode, interrupt mode, and DMA
mode.
Query mode
The CPU polls the length of the ADC FIFO. When the length of the FIFO is not empty, it indicates that there are valid
data in the FIFO, and the CPU can read these data from the FIFO.
Interrupt mode
BL702/704/706 Reference Manual 96/ 375
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