BL702/704/706 Reference Manual
Using the threshold interrupt of the FIFO, when the interrupt is generated and the number of ADC data reaches the
threshold, the CPU can read the length of the ADC FIFO in the interrupt service function and read it all.
DMA mode
The user sets the dmaen control bit, which can cooperate with the DMA to complete the transfer of the converted data
to the memory. When using the DMA mode, set the threshold of the number of data sent by the ADC FIFO through
the fifothl. When the DMA receives the request, it will automatically follow the user settings. The specified parameters
transfer the specified number of results from the FIFO to the corresponding memory.
4.3.8 ADC configuration process
Setting the ADC clock
According to the ADC conversion speed requirements, determine the working clock of the ADC, set the ADC clock
source and frequency division of the GLB module, and combine with clkdvrt to determine the final working module’s
clock frequency.
Set GPIO according to the channel used
According to the analog pin used, determine the channel number used, initialize the corresponding GPIO as an analog
function. It should be noted that when setting the GPIO as an analog input, do not set the GPIO pull-up or pull-down,
you need to set it to float.
Set the channel to be converted
Set the corresponding channel register according to the analog channel and conversion mode used.
For single-channel conversion, set the converted channel information in the possel and negsel registers.
For multi-channel scanning mode, set sclen, scpX and scnX according to the number of scanning channels and
scanning order.
Set the data reading method
According to the way of reading data introduced by ADC FIFO, select the mode to use and set the corresponding
register. If you use DMA, you also need to configure a channel of DMA to cooperate with the ADC FIFO to complete
the data transfer.
Start conversion
Finally set ressel to select the precision of the data conversion result. Finally set gben = 1 and cvst = 1 to start the
ADC to start conversion.
When the conversion is complete and needs to be converted again, cvst needs to be set to 0 and then set to 1 in
order to trigger the conversion again.
BL702/704/706 Reference Manual 97/ 375
@2021 Bouffalo Lab
To Next Page
Loading...