16 of 152 PSS5000/TEMA/803046/05
PSS 5000 – Technical Manual
2 System Description
2.2.2 Memory Structure
Memory areas on the
CPU board
The memory on the PSS 5000 CPU board is divided in to 4 areas.
The difference between the separate memory areas is indicated by what is re-
quired to clear or change the data.
Note: The RAM has a battery backup. If a power cut occurs, the battery pro-
vides power for more than 2 weeks and ensures that the data present in
the RAM is preserved.
Data in pss_mem/4 Data in memory area 4 is held in the RAM and is a "volatile working memory"
for programs. Although this area has battery back-up, all the data in this area
is cleared when a reset (software initialization) or power down takes place.
Data in pss_mem/3 Data in memory area 3 is held in RAM and is a "non-volatile working memo-
ry" for programs. This area has battery back-up, which enables data to be re-
tained during startup (initialization) and to survive a power down for weeks.
The area is cleared by a master reset. System configurations and status infor-
mation are intact after a period without power.
Data in pss_mem/2 Data in memory area 2 is held in RAM and is a "data storage memory" for the
programs. This area is cleared by a super master reset, but has battery back-up
to survive a power down for weeks. This data storage area is used for data that
must survive system re-configurations and program changes.
Data in pss_mem/1 Data in memory area 1 is held in a Flash Programmable Read Only Memory
(PROM) and is used to hold programs and system logs as described below:
Contents of FLASH Description
APPLICATION PROGRAM The Application Program holds the main fore-
court controller or converter application. The ap-
plications are specific for the devices connected
to the PSS 5000.
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