9-3
PERFORMANCE CONSIDERATIONS
must handle all of the writes. A later section examines bus utilization and on-chip cache hit rates
in more detail.
Table 9-1. Typical Instruction Mix and Execution Times for
the Intel486™ Processor
Instruction
Percentage
Utilization
Intel486™
Processor
Clocks
Intel486™
Accumulated
Clocks
Move R,M 16.2% 1.16 0.188
Move M,R 6.9% 1 0.069
Push R 6.1% 1 0.061
Move R,R 5.7% 1 0.057
Move R,I 5.5% 1 0.055
JCC taken 4.6% 3.4 0.156
JCC fail 4.5% 1 0.045
ALU2 R,R 4.3% 1 0.043
POP R 4.0% 1.16 0.046
JMP M 2.9% 3.4 0.099
ALU2 R,M 2.9% 2.16 0.063
ALU2 M,I 2.9% 3.16 0.092
Call 2.8% 3.4 0.095
Shift R 2.8% 2 0.056
ALU2 R,I 2.8% 1 0.028
RET 2.7% 5.56 0.028
String 2.6% 3.16 0.150
ALU1 R 1.2% 1 0.082
LDS 1.4% 12 0.020
ALU2 M,R 1.3% 3.16 0.168
ALU1 M 1.2% 3.16 0.041
Push M 1.1% 2.16 0.024
NOP 1.1% 1 0.011
Others 11.7% 2.25 0.263
Average clocks per instruction 1.95
NOTE: All percentages are approximate.