EMBEDDED Intel486™ PROCESSOR HARDWARE REFERENCE MANUAL
4-66
Figure 4-45. Snoop using HOLD during a Non-Cacheable, Non-Burstable Code Prefetch
4.4.3.6 Snoop under HOLD during Replacement Write-Back
Collision of snoop cycles under a HOLD during the replacement write-back cycle can never oc-
cur, because HLDA is asserted only after the replacement write-back cycle (burst or non-burst)
is completed.
242202-157
CLK
HOLD
EADS#
HITM#
A31–A4
A3–A2
ADS#
1 2 3 4 5 6 7 8 9 10111213141516171819
BLAST#
CACHE#
To Processor
W/R#
0 4 8 C
INV
RDY#
BRDY#
HLDA
C0 4 8
Prefetch Cycle
Write Back Cycle
Prefetch
Cont.
†
†
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