Intel Embedded Intel486

3
Internal Architecture
Chapter Contents
3.1 Instruction Pipelining............................................................3-6
3.2 Bus Interface Unit.................................................................3-7
3.3 Cache Unit...........................................................................3-10
3.4 Instruction Prefetch unit......................................................3-13
3.5 Instruction Decode Unit......................................................3-14
3.6 Control Unit ........................................................................3-14
3.7 Integer (Datapath) Unit .......................................................3-14
3.8 Floating-Point Unit .............................................................3-15
3.9 Segmentation Unit...............................................................3-15
3.10 Paging Unit .........................................................................3-16